|These pages were last modified 28/11/01.|
The above image (when enlarged) shows the functional blocks of the MarkIII network card. The construction of the card is very similar to the MarkI. It has similar performance, without the pipeline stall problem. The MarkIII is able to achieve raw data transfer rates in excess of 900Mbps, and small user level to user level application write transfer latencies of 1-2us. The raw bandwidth performance can be achieved without use of DMA.
The MarkIII also supports the Tripwire synchronisation mechanism, with the CAM array visible on the right of the PCB (to the left of the unnecessarily large heat-sinks).
Please note that the techniques disclosed here have been the subject of patent applications
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